fpga
2023
- Verification Concepts Oct 3
- Meeting Timing Closure Oct 3
- SerDes (Serialiser/Deserialiser) Oct 1
- Block RAMs Oct 1
- LUT Utilisation Sep 30
- AXI4-Stream, AXI4, AXI4-Lite, and AXI DMA Sep 29
- Universal Asynchronous Receiver Transmitter (UART) Sep 28
- Synthesis and Place and Route Sep 28
- Shift Registers Sep 28
- DSP Tiles Sep 28